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 Ordering number : ENA0069
LA76832N
Overview
Monolithic Linear IC
I2C Bus Control IC
The LA76832N is I2C bus controller ICs that support the NTSC and aim for rationalization of color TV set design, improved manufacturability, and lower total costs.
Functions
* I2C Bus Control VIF/SIF/Y/C/Deflection Implemented in a Single Chip
Specitications
Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Symbol V8 max V31 max V43 max Maximum supply current I18 max I25 max Allowable power dissipation Operating temperature Storage temperature Pd max Topr Tstg Ta65C * Conditions Ratings 7.0 7.0 7.0 25 35 1.6 -10 to +65 -55 to +150 Unit V V V mA mA W C C
*Provided with a glass epoxy board (114.3x76.1x1.6mm) Operating Conditions at Ta = 25C
Parameter Recommended supply voltage Symbol V8 V31 V43 Recommended supply current I18 I25 Operating supply voltage range V8 op V31 op V43 op Operating supply current range I25 op I18 op Conditions Ratings 5.0 5.0 5.0 19 27 4.7 to 5.3 4.7 to 5.3 4.7 to 5.3 24 to 30 17 to 21 Unit V V V mA mA V V V mA mA
Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein.
92706 / O3005 MS PC B8-5799 No.0069-1/39
LA76832N
Electrical Characteristics at Ta = 25C, VCCL = V8 = V31 = V43 = 5.0V, ICC = I18 = 19mA, ICC = I25 = 27mA
Parameter [Circuit voltage, current] IF supply current RGB supply current Horizontal supply voltage CCD supply current Video supply current [CCD block] Voltage gain Voltage gain B Difference of voltage gain Delay time [OSD block] OSD Fast SW threshold Red RGB output level Green RGB output level Blue RGB output level Analog OSD R output level Gain match Linearity Analog OSD G output level Gain match Linearity Analog OSD B output level Gain Match Linearity [RGB output (cutoff drive) block] Brightness control (Normal) Hi brightness (max) Low brightness (Min) Cutoff control (min) (Bias control) (max) Resolution Sub-bias control Resolution RB Drive adjustment Maximum output G Drive adjustment Maximum output RB Output attenuation G Output attenuation [VIF block] Maximum RFAGC voltage Minimum RFAGC voltage RF AGC Delay Pt (@DAC = 0) RF AGC Delay Pt (@DAC = 63) Input sensitivity No-signal video output voltage Sync signal tip level Video output amplitude Video S/N C-S beat level Differential gain Differential phase Maximum AFT output voltage Minimum AFT output voltage AFT detection sensitivity VRFH VRFL RFAGC0 RFAGC63 Vi VOn VOtip VO S/N IC-S DG DP VAFTH VAFTL VAFTS CW = 80dB, DAC = 0 CW = 80dB, DAC = 63 DAC = 0 DAC = 63 Output -3dB No signal CW = 80dB 80dB, AM = 78%, fm = 15kHz CW = 80dB V3.58MHz/V920MHz 80dB, 87.5% Video MOD 80dB, 87.5% Video MOD CW = 80dB, frequency variations CW = 80dB, frequency variations CW = 80dB, frequency variations 4.3 0.0 12.0 3.3 1.1 1.9 3.7 1.4 2.0 45 30 5.0 2.0 4.7 0.2 20.0 10.0 10.0 5.0 0.7 28.0 8.5 0 85 75 46 4.1 1.7 2.1 9 0.3 0.7 Vdc Vdc dB dB dB Vdc Vdc Vp-p dB dB % deg Vdc Vdc mV/kHz BRT63 BRT127 BRT0 Vbias0 Vbias255 Vbiassns Vsbiassns RBout127 Gout15 RBout0 Gout0 7 1.5 1.6 2.8 1.9 2.2 40 40 2.0 3.2 4 8 2.7 1.8 9 3.5 11 5.5 2.4 3.6 2.5 V IRE IRE V V mV/Bit mV/Bit Vp-p Vp-p dB dB FSTH ROSDH GOSDH BOSDH RRGB LRRGB GRGB LGRGB BRGB LBRGB 2.3 120 70 85 1.12 45 0.8 45 0.8 45 2.5 165 120 120 1.4 50 1.0 50 1.0 50 2.7 200 140 155 1.68 60 1.2 60 1.2 60 V IRE IRE IRE Ratio % Ratio % Ratio % GV_R GV_B DGV Td -2 -2 0 0 0 0.1 63.8 +2 +2 0.3 dB dB dB s I8 V18 V25 I31 I43 V8 = 5V V3 = 2.5V I18 = 19mA I25 = 27mA I31 = 5V I43 = 5V 55.0 65.0 8.0 5.0 5.6 150 75.0 mA V V mA mA Symbol Conditions min Ratings typ max Unit
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No.0069-2/39
LA76832N
Continued from preceding page.
Parameter APC pull-in range (U) APC pull-in range (L) [SIF block] FM detection output voltage FM limiting sensitivity FM detection output f characteristics FM detection output distortion AM rejection ratio SIF S/N de-emph time constant [AUDIO block] Maximum gain Variable range Frequency characteristics Mute Distortion S/N Crosstalk [Video SW block] Video signal input 1DC voltage Video signal input 1AC voltage Video signal input 2DC voltage Video signal input 2AC voltage SVO terminal DC voltage SVO terminal AC voltage [Filter block] Chroma trap amount NTSC Chroma trap amount PAL C-BPF1A (3.93MHz) C-BPF1B (4.73/4.13MHz) C-BPF1C (4.93/3.93MHz) C-BPF2A (3.93MHz) C-BPF2B (4.73/4.13MHz) C-BPF2C (4.93/3.93MHz) Y-DL TIME1 6MHz Trap Y-DL TIME2 PAL Y-DL TIME3 NTSC [Video block] Video overall gain (Contrast max) Contrast adjustment characteristics (Normal/max) Contrast adjustment characteristics (Min/max) Sharpness variability range (Normal) (max) (min) Sharp31 Sharp63 Sharp0 FILTER SYS = 0000 FILTER SYS = 0000 FILTER SYS = 0000 6.0 9.0 -4.0 9.0 12.0 -1.0 12.0 15.0 2.0 dB dB dB CONT0 -15.0 -12.0 -9.0 dB CONT127 CONT63 9.0 -7.5 11.0 -6.0 13.0 -4.5 dB dB CtrapN CtrapP CBPF1A CBPF1B CBPF1C CBPF2A CBPF2B CBPF2C TdY1 TdY2 TdY3 Reference : 4.43MHz FILTER SYS = 0010 Reference : 4.13MHz FILTER SYS = 0010 Reference : 3.93MHz FILTER SYS = 0010 Reference : 4.43MHz FILTER SYS = 0011 Reference : 4.13MHz FILTER SYS = 0011 Reference : 3.93MHz FILTER SYS = 0011 FILTER SYS = 0100 FILTER SYS = 0010 FILTER SYS = 0001 300.0 490.0 530.0 350.0 540.0 580.0 400.0 590.0 630.0 ns ns ns -2.5 0.0 2.5 dB -2.0 0.0 2.0 dB -4.0 -1.0 0.0 dB 6.0 4.0 1.0 dB -0.5 1.5 3.5 dB -36.0 -36.0 -6.0 -26.0 -26.0 -3.0 -22.0 -22.0 0.0 dB dB dB VIN1DC VIN1AC VIN2DC VIN2AC SVODC SVOAC 1.7 1.7 2.2 2.2 2.5 1 2.5 1 2.0 2.0 2.3 2.3 2.8 2.8 V Vp-p V Vp-p V Vp-p AGMAX ARANGE AF AMUTE ATHD ASN ACT 20kHz 20kHz 1kHz, 500mVrms, Vol : MAX DIN. Audio 1kHz 65 70 70 1kHz -2.5 60 -3.0 70 0.5 0.0 65 0.0 +3.0 +2.5 dB dB dB dB % dB dB SOADJ SLS SF STHD SAMR SSN SNTC Output -3dB fm = 100kHz FM = 25kHz AM = 30% DIN. Andio 40 50 3.0 -0.5 6.0 500 61 9.0 1.0 mVrms dB dB % dB dB dB Symbol fPU fPL Conditions min 1.0 1.0 Ratings typ max MHz MHz Unit
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No.0069-3/39
LA76832N
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Parameter Sharpness variability range (trap 1 mid) (trap 1 max) (trap 1 min) Sharpness variability range (trap 2 mid) (trap 2 max) (trap 2 min) Sharpness variability range (trap 3 mid) (trap 3 max) (trap 3 min) Black stretch gain max Black stretch gain mid Black stretch gain min Black stretch start point max (60IRE V) Black stretch start point mid (50IRE V) Black stretch start point min (40IRE V) DC transmission amount 1 DC transmission amount 2 DC transmission amount 3 DC transmission amount 4 Horizontal/vertical blanking output level Video frequency characteristics 1 6MHz Trap Video frequency characteristics 2 PAL Video frequency characteristics 3 NTSC White peak limiter effective point 1 White peak limiter effective point 2 Y gamma effective point 1 Y gamma effective point 2 Y gamma effective point 3 Pre-shoot adjust 1 Pre-shoot adjust 2 [Chroma block] : PAL/NTSC common B-Y/Y amplitude ratio Color control characteristics 1 Color control characteristics 2 Color control sensitivity Residual higher harmonic level B Residual higher harmonic level R Residual higher harmonic level G [Chroma block] : PAL ACC amplitude characteristics 1 ACC amplitude characteristics 2 Demodulation output ratio R-Y/B-Y : PAL Demodulation output ratio G-Y/B-Y : PAL ACCM1_P ACCM2_P RB_P GB_P Input : +6dB/0dB 0dB = 40IRE Input : -20dB/0dB R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center, R-Y = no-signal Demodulation output ratio G-Y/R-Y : PAL GR_P R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center, B-Y = no-signal Demodulation angle R-Y/B-Y : PAL Killer operating point ANGRB_P KILL_P R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center 0dB = 40IRE -39 -33 -26 dB 85 90 95 deg -0.56 -0.51 -0.46 times -0.21 -0.19 -0.17 times 0.8 0.7 0.50 1.0 1.0 0.56 1.2 1.1 0.67 times times times CLRBY CLRMN CLRMM CLRSE E_CAR_B E_CAR_R E_CAR_G Color MAX/CEN Color MAX/MIN 75 1.6 33 1 100 2.0 40 2 150 2.4 50 4 300 300 300 % times dB %/bit mVp-p mVp-p mVp-p BW2 BW3 WPL1 WPL2 YG1 YG2 YG3 PreShoot1 PreShoot2 1.8MHz/100kHz, Filter sys = 0010 1.4MHz/100kHz, Filter sys = 0000 APL = 10% WPL = 01 APL = 100% WPL = 01 YGAMMA = 01 YGAMMA = 10 YGAMMA = 11 Pre-shoot adj. = 00 Pre-shoot adj. = 11 -6.0 -6.0 90.0 150.0 89.0 81.0 76.0 0.92 1.08 -3.0 -3.0 95.0 160.0 93.0 85.0 80.0 0.97 1.13 0.0 0.0 100.0 170.0 97.0 89.0 84.0 1.02 1.18 dB dB IRE IRE % % % Symbol Sharp32T1 Sharp63T1 Sharp0T1 Sharp32T1 Sharp63T1 Sharp0T1 Sharp32T1 Sharp63T1 Sharp0T1 BKSTmax BKSTmid BKSTmin BKSTTHmax BKSTTHmid BKSTTHmin ClampG1 ClampG2 ClampG3 ClampG4 RGBBLK BW1 3.4MHz/100kHz, Filter sys = 0100 Conditions min F = 2.2MHz, FILTER SYS = 000 F = 2.2MHz, FILTER SYS = 000 F = 2.2MHz, FILTER SYS = 000 F = 2.7MHz, FILTER SYS = 010 F = 2.7MHz, FILTER SYS = 010 F = 2.7MHz, FILTER SYS = 010 F = 3.0MHz, FILTER SYS = 100 F = 3.0MHz, FILTER SYS = 100 F = 3.0MHz, FILTER SYS = 100 Gain = 10, Start = 01 Gain = 01, Start = 01 Gain = 00, Start = 01 Bain = 01, Start = 10 Bain = 01, Start = 01 Bain = 01, Start = 00 DCREST = 00 DCREST = 01 DCREST = 10 DCREST = 11 5.0 8.5 -6.5 5.0 8.5 -6.5 5.0 8.5 -6.5 23.0 16.0 9.0 -5.0 -5.0 -5.0 95.0 102.0 107.0 113.0 0.1 -6.0 Ratings typ 8.0 11.5 -3.5 8.0 11.5 -3.5 8.0 11.5 -3.5 28.0 21.0 14.0 0.0 0.0 0.0 100.0 107.0 112.0 118.0 0.4 -3.0 max 11.0 13.5 -0.5 11.0 13.5 -0.5 11.0 13.5 -0.5 33.0 26.0 19.0 +5.0 +5.0 +5.0 105.0 112.0 117.0 123.0 0.7 0.0 dB dB dB dB dB dB dB dB dB IRE IRE IRE IRE IRE IRE % % % % V dB Unit
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No.0069-4/39
LA76832N
Continued from preceding page.
Parameter APC pull-in range (+) APC pull-in range (-) [Chroma block] : NTSC ACC amplitude characteristics 1 ACC amplitude characteristics 2 Demodulation output ratio R-Y/B-Y : NTSC Demodulation output ratio G-Y/B-Y : NTSC Demodulation angle B-Y/R-Y : NTSC Demodulation angle G-Y/B-Y : NTSC Demodulation angle switch G-Y/B-Y : NTSC Killer operating point APC pull-in range (+) APC pull-in range (-) Tint center Tint variable range (+) Tint variable range (-) [Deflection block] Horizontal free-running frequency Horizontal pull-in range Horizontal output pulse width Horizontal output pulse saturation voltage Vertical free-running cycle 50 Vertical free-running cycle 60 Horizontal output pulse phase Horizontal output pulse phase Horizontal position adjustment range Horizontal position adjustment maximum variability width Horizontal blanking left @0 Horizontal blanking left @7 Horizontal blanking right @0 Horizontal blanking right @7 Sand castle pulse crest value H Sand castle pulse crest value M1 Sand castle pulse crest value L Sand castle pulse crest value M2 Burst gate pulse width Burst gate pulse phase Horizontal output stop voltage X-ray protection circuit operating voltage [Vertical screen size adjustment] Vertical ramp output amplitude PAL@64 Vertical ramp output amplitude NTSC@64 Vertical ramp output amplitude PAL@0 Vertical ramp output amplitude PAL@127 Vspal64 Vsnt64 Vspal0 Vspal127 VSIZE : 1000000 VSIZE : 1000000 VSIZE : 0000000 VSIZE : 1111111 0.75 0.75 0.40 1.05 0.85 0.85 0.50 1.20 0.95 0.95 0.60 1.35 Vp-p Vp-p Vp-p Vp-p BLKL0 BLKL7 BLKR0 BLKR7 SANDH SANDM1 SANDL SANDM2 BGPWD BGPPH Hstop VXRAY BLKL : 000 BLKL : 111 BLKR : 000 BLKR : 111 7500 10800 1800 -1100 5.3 3.7 0.1 1.7 3.5 4.9 3.30 0.59 8300 11600 2600 -300 5.6 4.0 0.4 2.0 4.0 5.4 3.60 0.69 9100 12400 3400 500 5.9 4.3 0.7 2.3 4.5 5.9 3.90 0.79 ns ns ns ns V V V V s s V V fH fH PULL Hduty V Hsat VFR50 VFR60 HPHCENpal HPHCENnt HPHrange HPHstep 5bit 530 400 36.1 0 312.0 262.0 9.5 9.5 37.6 0.2 312.5 262.5 10.5 10.5 2.2 200.0 39.1 0.4 313.0 263.0 11.5 11.5 680 830 Hz Hz s V H H s s s ns ACCM1_N ACCM2_N RB_N GB_N ANGBR_N ANGGB_N ANGGC_N KILL_N PULIN+_N PULIN-_N TINCEN TINT+ TINT-10 35 -35 0 Input : +6dB/0dB 0dB = 40IRE Input :-20dB/0dB R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center G-Y Angle_DAC = 1 0dB = 40IRE 243 -40 350 -350 +10 253 -35 263 -28 deg dB Hz Hz deg deg deg 227 240 250 deg 99 104 109 deg 0.24 0.30 0.38 times 0.8 0.7 0.80 1.0 1.0 0.90 1.2 1.1 1.00 times times times Symbol PULIN+_P PULIN-_P Conditions min 350 -350 Ratings typ max Hz Hz Unit
[High-voltage dependent vertical size correction] Vertical size correction @0 Vsizecomp VCOMP : 000 0.83 0.88 0.93 ratio
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No.0069-5/39
LA76832N
Continued from preceding page.
Parameter [Vertical screen position adjustment] Vertical ramp DC voltage PAL@32 Vertical ramp DC voltage NTSC@32 Vertical ramp DC voltage PAL@0 Vertical ramp DC voltage PAL@63 Vertical linearity @16 Vertical linearity @0 Vertical linearity @31 Vertical S-shaped correction @16 Vertical S-shaped correction @0 Vertical S-shaped correction @31 [Horizontal screen size adjustment] East/West DC Voltage@32 East/West DC Voltage@0 East/West DC Voltage@63 EWdc32 EWdc0 EWdc63 EWDC : 100000 EWDC : 000000 EWDC : 111111 1.90 0.90 2.90 2.30 1.30 3.30 2.70 1.70 3.70 Vdc Vdc Vdc Vdcpal32 Vdcnt32 Vdcpal0 Vdcpal63 Vlin16 Vlin0 Vlin31 VScor16 VScor0 VScor31 VDC : 100000 VDC : 100000 VDC : 000000 VDC : 111111 VLIN : 10000 VLIN : 00000 VLIN : 11111 VSC : 10000 VSC : 00000 VSC : 11111 2.25 2.25 1.85 2.65 0.85 1.17 0.57 0.55 0.85 0.36 2.40 2.40 2.00 2.80 1.00 1.32 0.72 0.70 1.00 0.51 2.55 2.55 2.15 2.95 1.15 1.47 0.87 0.85 1.15 0.66 Vdc Vdc Vdc Vdc ratio ratio ratio ratio ratio ratio Symbol Conditions min Ratings typ max Unit
[High-voltage dependent horizontal size compensation] Horizontal size compensation@0 [Pincushion correction] East/West amplitude@32 East/West amplitude@0 East/West amplitude@63 [Correction of trapezoidal distortion] East/West parabolic tilt@32 East/West parabolic tilt@0 East/West parabolic tilt@63 [Correction of corner distortion] East/West parabolic corner top East/West parabolic corner bottom EWcorTOP EWcorBOT CORTOP : 1111-0000 CORBOTTOM : 1111-0000 0.30 0.30 0.70 0.70 1.10 1.10 V V EWtilt32 EWtilt0 EWtilt63 EWTILT : 100000 EWTILT : 000000 EWTILT : 111111 -0.40 -1.40 0.60 0.00 -1.00 1.00 +0.40 -0.6 1.40 V V V EWamp32 EWamp0 EWamp63 EWAMP : 100000 EWAMP : 000000 EWAMP : 111111 0.90 -0.40 2.20 1.30 0.00 2.60 1.70 +0.40 3.00 Vp-p Vp-p Vp-p Hsizecomp HCOMP : 000 0.1 0.3 0.50 V
Test Conditions at Ta = 25C, VCC = V8 = V31 = V43 = 5.0V, I18 = 19mA, ICC = I25 = 27mA
Parameter [Circuit voltage, current] Horizontal supply voltage (pin 25) RGB supply voltage (pin 18) IF supply current (pin 8) V25 V18 I8 (CDDICC) I8 (CDDICC) Video/vertical supply current (pin 43) I43 (DEFICC) 25 18 8 No signal No signal No signal Apply a current of 27mA to pin 25 and measure the voltage at pin 25. Apply a current of 19mA to pin 18 and measure the voltage at pin 18. Apply a voltage of 5.0V to pin 8 and measure the incoming DC current (mA). (IF AGC 2.5V applied) CCD supply current (pin 31) 31 No signal Apply a voltage of 5.0V to pin 31 and measure the incoming DC current (mA). No signal Apply a voltage of 5.0V to pin 43 and measure the incoming DC current (mA). Initial Initial Initial Initial Initial Symbol Test point Input signal Test method Bus conditions
43
No.0069-6/39
LA76832N
VIF Block Input Signals and Test Conditions 1. 2. 3. 4. Input signals must all be input to the PIF IN (pin 6) in the Test Circuit. All input signal voltage values are the levels at the VIF IN (pin 6) in the Test Circuit. Signal contents and signal levels Bus control condition : VIF SYS = "10"
Input signal SG1 Waveform 45.75MHz Conditions
SG2
42.17MHz
SG3
41.25MHz
SG4
Frequency variable
SG5
45.75MHz 87.5% Video Mod. 10-stairstep wave (Subcarrier : 3.58MHz)
SG6
45.75MHz fm = 15kHz, AM = 78%
5. Before measurement, adjust the DAC as follows.
Parameter Video Level DAC Test point 46 Input signal SG6, 80dB Test method Set the output level at pin 46 as close to 2.0Vp-p as possible.
No.0069-7/39
LA76832N
Parameter [VIF block] Maximum RF AGC voltage Minimum RF AGC voltage RF AGC Delay Pt (@DAC = 0) RF AGC Delay Pt (@DAC = 63) Input sensitivity Vi RFAGC63 VRFH VRFL RFAGC0 4 4 4 4 46 SG1 80dB SG1 80dB SG1 SG1 SG6 Obtain the input level at which the DC voltage at pin 4 becomes 4.5V. Obtain the input level at which the DC voltage at pin 4 becomes 4.5V. Using an oscilloscope, observe the level at pin 46 and obtain the input level at which the waveform's p-p value becomes 1.4Vp-p. No-signal video output voltage Sync signal tip level Video output amplitude Video S/N VOtip VO S/N VOn 46 46 46 46 No signal SG1 80dB SG6 80dB SG1 80dB SG1 SG2 SG3 Using an oscilloscope, observe the level at pin 46 and measure the waveform's p-p value. Measure the noise voltage (Vsn) at pin 46 with an RMS voltmeter through a 10kHz to 4.2MHz band-pass filter and calculate 20Log (1.43/Vsn). C-S beat level IC-S 46 Input a 80dB SG1 signal and measure the DC voltage (V3) at pin 3. Mix SG1 = 74dB, SG2 = 64dB, and SG3 = 64dB to enter the mixture in the VIF IN. Apply V3 to pin 3 from an external DC power supply. Using a spectrum analyzer, measure the difference between pin 46's 3.58MHz component and 920MHz component. Differential gain Differential phase Maximun AFT output voltage Minimun AFT output voltage AFT detection sensitivity VAFTS VAFTL DG DP VAFTH 46 46 10 SG5 80dB SG5 80dB SG4 80dB SG4 80dBz SG4 80dBz Using a vector scope, measure the level at Pin 46. Using a vector scope, measure the level at Pin 46. Set and input the SG4 frequency to 44.75MHz to be input. Measure the DC voltage at pin 10 at that moment. 10 Set and input the SG4 frequency to 46.75MHz to be input. Measure the DC voltage at pin 10 at that moment. 10 Adjust the SG4 frequency and measure frequency deviation f when the DC voltage at pin 10 changes from 1.5V to 3.5V. VAFTS = 2000/f [mV/kHz] APC pull-in range (U), (L) fPU, fPL 46 SG4 80dB Connect an oscilloscope to pin 46 and adjust the SG4 frequency to a frequency higher than 45.75MHz to bring the PLL into unlocked mode. (A beat signal appears.) Lower the SG4 frequency and measure the frequency at which the PLL locks again. In the same manner, adjust the SG4 frequency to a lower frequency to bring the PLL into unlocked mode. Lower the SG4 frequency and measure the frequency at which the PLL locks again. Set IF AGC = "1" and measure the DC voltage at pin 46. Measure the DC voltage at pin 46. RF. AGC = "111111" RF. AGC = "000000" Measure the DC voltage at pin 4. RF. AGC = "111111" Measure the DC voltage at pin 4. RF. AGC = "000000" Symbol Test point Input signal Test method Bus conditions
No.0069-8/39
LA76832N
SIF Block (FM block) Input Signals and Test Conditions Unless otherwise specified, the following conditions apply when each measurement is made. 1. Bus control condition : IF. AGC. SW = "1", SIF.SYS = "00", DEEM-TC = "1", FM.GAIN = "1" 2. SW : IF1 = "ON" 3. Input signals are input to pin 54 and the carrier frequency is 4.5MHz.
Parameter FM detection output voltage Symbol SOADJ Test point 2 Input signal 90dB, fm = 400Hz, FM = 25kHz Test method Adjust the DAC (FM. LEVEL) such that the 400 Hz component of the FM detection output at pin 2 become as close to 500 mVrms as possible and measure (SV1 : mVrms) the output at that moment. FM limiting sensitivity SLS 2 fm = 400Hz, FM = 25kHz 90dB, fm = 100kHz, FM = 25kHz STHD 90dB, fm = 400Hz, FM = 25kHz AM rejection ratio SAMR 2 90dB, fm = 400Hz, AM = 30% Measure the 1kHz component (SV3 : mVrms) of the FM detection output at pin 2. Assign the measured value to SV3 and calculate as follows : SAMR = 20Log (SV1/SV3) [dB] SIF. S/N SSN 2 90dB, CW Measure the noise level (DIN AUDIO, SV4 : mVrms) at pin 2. Calculate as follows : SSN = 20Log (SV1/SV4) [dB] NT de-emph time constant SNTC 2 90dB, fm = 2.12kHz, FM = 25kHz Measure the 2.12kHz component (SV5 : mVrms) of the FM detection output at pin 2 and calculate as follows : SNTC = 20Log (SV1/SV5) [dB] FM level = Adjustment value FM level = Adjustment value FM level = Adjustment value Measure the input level (dB) at which the 400Hz component of the FM detection output at pin 2 becomes -3dB relative to SV1. FM detection output f characteristics (fm=100kHz) SF 2 Set SW : IF1 = "OFF". Measure (SV2 : mVrms) the FM detection output of pin 2. Calculate as follows : SF = 20Log (SV1/SV2) [dB] FM detection output distortion 2 Measure the distortion factor of the 400Hz component of the FM detection output at pin 2. FM level = Adjustment value FM level = Adjustment value FM level = Adjustment value Bus conditions
No.0069-9/39
LA76832N
Audio Block Input Signals and Test Conditions Unless otherwise specified, the following conditions apply when each measurement is made. 1. Bus control condition : AUDIO. MUTE = "0", AUDIO. SW = "1", VOL. FIL = "0" , SIF. SYS = "00", IF. AGC. SW = "1" 2. Input 4.5MHz, 90dB and CW at pin 54. 3. Enter an input signal from pin 51.
Parameter Maximum gain Symbol AGMAX Test point 1 Input signal 1kHz, CW 500mVrms Test method Measure the 1kHz component (V1 : mVrms) at the pin 1 and calculate as follows : AGMAX = 20Log (V1/500) [dB] Variable range ARANGE 1 1kHz, CW 500mVrms Measure the 1kHz component (V2 : mVrms) at the pin 1 and calculate as follows : ARANGE = 20Log (V1/V2) [dB] Frequency characteristics AF 1 20kHz, CW 500mVrms Measure the 20kHz component (V3 : mVrms) at the pin 1 and calculate as follows : AF = 20Log (V3/V1) [dB] Mute AMUTE 1 20kHz, CW 500mVrms Measure the 20kHz component (V4 : mVrms) at the pin 1 and calculate as follows : AMUTE = 20Log (V3/V4) [dB] Distortion S/N ATHD ASN 1 1 1kHz, CW 500mVrms No signal Measure the distortion of the 1kHz component at the pin 1. Measure the noise level (DIN AUDIO, V5 : mVrms) at the pin 1 and calculate as follows : ASN = 20Log (V1/V5) [dB] Crosstalk ACT 1 1kHz, CW 500mVrms Measure the 1kHz component (V6 : mVrms) at the pin 1 and calculate as follows : ACT = 20Log (V1/V6) [dB] VOLUME = "1111111" AUDIO. SW = "0" VOLUME = "1111111" AUDIO.MUTE = "1" VOLUME = "1111111" VOLUME = "1111111" VOLUME = "1111111" VOLUME = "0000000" Bus conditions VOLUME = "1111111"
No.0069-10/39
LA76832N
Video Block Input Signals and Test Conditions 1. C IN Inputchroma burst signal : 40 IRE 2. Y IN input signal 100IRE : 714mV 3. Bus control bit conditions : Initial test state OIRE signal (L-O) : NTSC standard sync signal
XIRE signal (L-X)
CW signal (L-CW)
BLACK STRETCH OIRE signal (L-BK)
No.0069-11/39
LA76832N
4. R/G/B IN Input signal RGB Input signal 1 (O-1)
RGB Input signal 2 (O-2)
Parameter [Video block] Video overall gain (Contrast max) Contrast adjustment characteristics (normal/max) Contrast adjustment characteristics (min/max) Video frequency Characteristics 1 (SVHS)
Symbol
Test point
Input signal
Test method
Bus bit/input signal
CONT127
21
L-50
Measure the output signal's 50IRE amplitude (CNTHB Vp-p) and calculate CONT127 = 20Log (CNTHB/0.357).
CONTRAST : 1111111
CONT63
21
L-50
Measure the output signal's 50IRE amplitude (CNTCB Vp-p) and calculate CONT63 = 20Log (CNTCB/0.357).
CONTRAST : 0111111
CONT0
21
L-50
Measure the output signal's 50IRE amplitude (CNTLB Vp-p) and calculate CONT0 = 20Log (CNTLB/0.357).
CONTRAST : 0000000
BW1
21
L-CW
With the input signal's continuous wave = 100kHz, measure the output signal's continuous wave amplitude (PEAKDC Vp-p). With the input signal's continuous wave = 6MHz, measure the output signal's continuous wave amplitude (CW1.4 Vp-p). Calculate BW1 = 20Log (CW1.4/PEAKDC).
FILTER SYS : 000 SHARPNESS : 000000
Video frequency Characteristics 2 (PAL) Video frequency Characteristics 3 (NTSC) Chroma trap amount PAL
BW2
21
L-CW
With the input signal's continuous wave = 1.8MHz, measure the output signal's continuous wave amplitude (CW1.8 Vp-p). Calculate BW2 = 20Log (CW1.8/PEAKDC).
FILTER SYS : 010 SHARPNESS : 000000
BW3
21
L-CW
With the input signal's continuous wave = 3.4MHz, measure the output signal's continuous wave amplitude (CW3.4 Vp-p). Calculate BW3 = 20Log (CW3.4/PEAKDC).
FILTER SYS : 100 SHARPNESS : 000000
CtraPP
21
L-CW
With the input signal's continuous wave = 4.43MHz, measure the output signal's continuous wave amplitude (F0P Vp-p). Calculate CtraP = 20Log (F0P/PEAKDC).
FILTER SYS : 010 SHARPNESS : 000000
Chroma trap amount NTSC
CtraPN
21
L-CW
With the input signal's continuous wave = 3.58MHz, measure the output signal's continuous wave amplitude (F0N Vp-p). Calculate CtraN = 20Log (F0N/PEAKDC).
FILTER SYS : 000 SHARPNESS : 000000
Continued on next page.
No.0069-12/39
LA76832N
Continued from preceding page.
Parameter DC transmission amount Symbol ClampG Test point 21 Input signal L-0 L-100 (BRTPL V). Measure the output signal's 0IRE DC level (DRVPH V) and 100IRE amplitude (DRVH Vp-p) and calculate ClampG = 100x (1+ (DRVPHBRTPL)/DRVH). Y-DL TIME1 (SVHS) TdY1 21 L-50 Obtain the time difference (the delay time) from when the rise of the input signal's 50IRE amplitude to the output signal's 50IRE amplitude. Y-DL TIME2 (PAL) TdY2 21 L-50 Obtain the time difference (the delay time) from when the rise of the input signal's 50IRE amplitude to the output signal's 50IRE amplitude. Y-DL TIME3 (NTSC) TdY3 21 L-50 Obtain the time difference (the delay time) from when the rise of the input signal's 50IRE amplitude to the output signal's 50IRE amplitude. Y-DL TIME4 (SECAM) TdY4 21 L-50 Obtain the time difference (the delay time) from when the rise of the input signal's 50IRE amplitude to the output signal's 50IRE amplitude. Maximum black stretch gain BKSTmax 21 L-BK Measure the 0IRE DC level (BKST1 V) at point A of the output signal in the Black Stretch Defeat (Black Stretch OFF) mode. Measure the 0IRE DC level (BKST2 V) at point A of the output signal in the Black Stretch ON mode. Calculate BKSTmax = 2x50x (BKST1-BKST2) /CNTHB. Black stretch threshold black (60IRE black) BKSTTH 21 L-60 Measure the 60IRE DC level (BKST3 V) of the output signal in the Black Stretch Defeat ON mode. Measure the 60IRE DC level (BKST4 V) of the output signal in the Black Stretch Defeat (Black Stretch OFF) mode. Calculate BKSTTH = 50x (BKST4-BKST3)/CNTHB. Sharpness variability characteristics (normal) Sharp31 21 L-CW With the input signal's continuous wave = 2.2MHz, measure the output signal's continuous wave amplitude (F00S31 Vp-p). Calculate Sharp31 = 20Log (F00S31/PEAKDC). (max) Sharp63 L-CW With the input signal's continuous wave = 2.2MHz, measure the output signal's continuous wave amplitude (F00S63 Vp-p). Calculate Sharp63 = 20Log (F00S63/PEAKDC). (min) Sharp0 L-CW With the input signal's continuous wave = 2.2MHz, measure the output signal's continuous wave amplitude (F00S0 Vp-p). Calculate Sharp0 = 20Log (F00S0/PEAKDC). Horizontal/vertical blanking output level [OSD block] OSD Fast SW threshold FSTH L-0 O-2 L-50 RGBBLK 21 L-100 Measure the DC level (RGBBLK V) for the output signal's blanking period. Bus control bit conditions : Contrast=63, Brightness=63 21 Apply voltage to pin 17 and measure the voltage at pin 17 at the point where the output signal switches to the OSD signal. Red RGB output level ROSDC 19 Measure the output signal's 50IRE amplitude (CNTCR Vp-p). L-0 O-2 Measure the OSD output amplitude (OSDHR Vp-p). Calculate ROSDH = 50x (OSDHR/CNTCR). Pin 17 : 3.5V Pin 14A : O-2 applied Contrast : 0111111 Brightness : 0111111 Pin 16A : O-2 applied FILTER SYS : 0000 Sharpness : 000000 FILTER SYS : 0000 Sharpness : 111111 FILTER SYS : 0000 Sharpness : 100000 Blk Str DEF : 0 Blk Str DEF : 0 FILTER SYS : 1000 FILTER SYS : 0000 FILTER SYS : 0010 FILTER SYS : 0100 Test method Measure the output signal's 0IRE DC level Bus bit/input signal Brightness : 0000000 CONTRAST : 1111111 Brightness : 0000000 CONTRAST : 1111111
Continued on next page.
No.0069-13/39
LA76832N
Continued from preceding page.
Parameter Green RGB output level Symbol GOSDC Test point 20 Input signal L-50 (CNTCG Vp-p). L-0 O-2 Measure the OSD output amplitude (OSDHG Vp-p). Calculate GOSDC = 50x (OSDHG/CNTCG). Blue RGB output level BOSDC 21 L-50 Measure the output signal's 50IRE amplitude (CNTCB Vp-p). L-0 O-2 Measure the OSD output amplitude (OSDHB Vp-p). Calculate BOSDC = 50x (OSDHB/CNTCB) Analog OSD R output level Gain match linearity Analog OSD G output level Gain match linearity Analog OSD B output level Gain match linearity [RGB output block] (Cutoff, drive block) Brightness control (normal) BRT63 19 20 21 L-0 Measure the 0IRE DC levels of the respective output signals of R output (19), G output (20), and B output (21). Assign the measured values to BRTPCR, BRTPCG, and BRTPCB V, respectively. Calculate BRT63 = (BRTPCR+BRTPCG+BRTPCB) /3. (max) BRT127 21 Measure the 0IRE DC level of the output signal of B output (21) and assign the measured value to BRTPHB. Calculate BRT127 = 50x (BRTPHB-BRTPCB)/CNTHB. (min) BRT0 Measure the 0IRE DC level of the output signal of B output (21) and assign the measured value to BRTPLB. Calculate BRT0 = 50x (BRTPLB-BRTPCB)/CNTHB. Brightness : 0000000 Brightness : 1111111 Brightness : 01111111 BRGB LBRGB GRGB LGRGB 21 L-0 O-1 RRGB LRRGB 20 L-0 O-1 19 L-0 O-1 Measure the amplitudes at point A (0.35V portion of the input signal 0-1) and point B (0.7V portion of the input signal 0-1) of the output signal. Assign the measured values to RGBLR Vp-p and RGBHR Vp-p, respectively. Calculate RRGB = RGBLR/CNTCR. Calculate LRRGB = 100x (RGBLR/RGBHR). Measure the amplitudes at point A (0.35V portion of the input signal 0-1) and point B (0.7V portion of the input signal 0-1) of the output signal. Assign the measured values to RGBLG Vp-p and RGBHG Vp-p, respectively. Calculate GRGB = RGBLG/CNTCG. Calculate LGRGB = 100x (RGBLG/RGBHG). Measure the amplitudes at point A (0.35V portion of the input signal 0-1) and point B (0.7V portion of the input signal 0-1) of the output signal. Assign the measured values to RGBLB Vp-p and RGBHB Vp-p, respectively. Calculate BRGB = RGBLB/CNTCB. Calculate LBRGB = 100x (RGBLB/RGBHB). Bus control bit conditions : Contrast = 127 Contrast : 1111111 Pin 17 : 3.5V Pin 16A : O-1 applied Pin 17 : 3.5V Pin 15A : O-1 applied Pin 17 : 3.5V Pin 14A : O-1 applied Pin 17 : 3.5V Pin 16A : O-2 applied Pin 17 : 3.5V Pin 15A : O-2 applied Test method Measure the output signal's 50IRE amplitude Bus bit/input signal
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No.0069-14/39
LA76832N
Continued from preceding page.
Parameter Bias (cutoff) control (max) Vbias255 (min) Symbol Vbias0 Test point 19 20 21 Input signal L-50 Test method Measure the 0IRE DC levels (Vbias0* V) of the respective output signals of R output (19), G output (20), and B output (21). * : R, G, and B Measure the 0IRE DC levels (Vbias255* V) of the respective output signals of R output (19), G output (20), and B output (21). * : R, G, and B Bias (cutoff) control resolution Vbiassns Measure the 0IRE DC levels (BAS80* V) of the respective output signals of R output (19), G output (20), and B output (21). * : R, G, and B Measure the 0IRE DC levels (BAS48* V) of the respective output signals of R output (19), G output (20), and B output (21). Calculate Vbiassns* = (BAS80*-BAS48*) /32 Sub-bias control resolution Vsbiassns L-50 Measure the 0IRE DC levels (SBTPM* V) of the respective output signals of R output (19), G output (20), and B output (21). Calculate Vsbiassns* = (BRTPC*-SBTPM*) Drive adjustment maximum output Gout15 RBout127 19 20 21 L-100 Measure the 100IRE amplitudes (DRVH* Vp-p) of the respective output signals of R output (19) and B output (21). * : R and B Measure the 100IRE amplitude of the output signal of G output (20) and assign the measured value to DRVH* Vp-p. *:G Output attenuation RBout0 Measure the 100IRE amplitudes (DRVL* Vp-p) of the respective output signals of R output (19), G output (20), and B output (21). * : R and B Measure the 100IRE amplitude of the output signal of G output (20) and assign the measured value to DRVL* Vp-p. *:G Gout0 RBout0* = 20Log (DRVH*/DRVL*) Gout0* = 20Log (DRVH*/DRVL*) Bus control bit conditions : Contrast = 63, Brightness = 63 [VIDEO SW block] Video signal input 1DC voltage Video signal input 2DC voltage SVO terminal DC voltage SVO terminal AC voltage SVODC SVOAC VIN2DC VIN1DC 42 44 40 40 L-100 L-100 L-100 L-100 Input signals to pin 42 and measure the voltage of the pedestal. Input signals to pin 44 and measure the voltage of the pedestal. Input signals to pin 42 and measure the voltage of the pedestal at pin 40. Input signals to pin 42 and measure the voltage of the pedestal at pin 40. VIDEO SW : 1 VIDEO SW : 1 VIDEO SW : 0 VIDEO SW : 1 Contrast: 0111111 Brightness : 01111111 Brightness : 0000000 Red/Blue Drive : 0000000 Brightness : 0000000 Sub-Brightness : 0101010 Contrast : 0111111 Red/Green/Blue Bias : 00110000 Sub-Brightness : 1111111 Red/Green/Blue Bias : 11111111 Red/Green/Blue Bias : 01010000 Bus bit/input signal Sub-Brightness : 0000000
No.0069-15/39
LA76832N
Chroma Block Input Signals and Test Conditions Unless otherwise specified, the following conditions apply when each measurement is made. 1. VIF, SIF blocks : No signal 2. Deflection Block : Horizontal/vertical composite sync signals are input and the deflection block must be locked into the sync signals (Refer to the Deflection Block Input Signals and the Test Conditions). 3. Bus control conditions : Set the following conditions unless otherwise specified. Y Input is 42 Pin (EXT-V IN), C Input is 44 Pin (S-C IN) (Video SW = 1, C. Ext = 1) Other DAC except the above-mentioned conditions is all initial conditions. 4. Y Input condition: No signal unless otherwise specified. (Sync is necessary to obtain synchronization). 5. How to calculate the demodulation ratio and angle : B-Y axis angle = tan-1 (B ( 0) /B (270) ) +270 R-Y axis angle = tan-1 (R (180) /R ( 90) ) +90 G-Y axis angle = tan-1 (G (270) /G (180) ) +180
B-Y axis amplitude Vb = SQRT (B ( 0) B ( 0) +B (270) B (270) ) R-Y axis amplitude Vr = SQRT (R (180) R (180) +R (90) R (90) ) G-Y axis amplitude Vg = SQRT (G (180) G (180) +G (270) G (270) )
No.0069-16/39
LA76832N
6. Chroma input signal : As for the PAL signal, the burst swings such as 130 and 225 every one hour. Chroma describes the phase caused when the burst occurs at 135. As for the NTSC signal, the burst occurs constantly at 180. The figures below are based on the phase of NTSC. When a PAL signal is generated, adjust the phase and then enter signals. The item common to both PAL and NTSC is the PAL signal. For those other than this, the measurement must be performed for each individual signals. The condition of fsc: Set the following conditions unless otherwise specified. PAL = 4.433619MHz NTSC = 3.579545MHz
C-1
X IRE signal (L-X)
C-2
C-3
(Note : fscN*fh when the frequency is specified. N should be a natural number and the nearest value should be used.)
C-4
C-5
No.0069-17/39
LA76832N
Parameter Symbol Test point Input signal Test method Bus conditions
[Chroma block] : PAL/NTSC common B-Y/Y amplitude ratio CLRBY Bout 21 YIN : L77 CIN : No signal C-2 Measure the Y system's output level. V1 Input a signal to the CIN (only sync signal to the YIN) and measure the output level to calculate as follows : CLRBY = 100x (V2/V1)+15% Color control characteristics 1 CLRMN 21 C-1 Measure the output amplitude V1 at color control MAX mode and output amplitude V2 at color control CEN mode and, calculate as follows : CLRMN = V1/V2 Color control characteristics 2 CLRMM 21 C-1 Measure the output amplitude V3 at color control MIN mode to calculate as follows : CLRMM = 20Log (V1/V3) Color control sensitivity CLRSE 21 C-1 Measure the output amplitude V4 at color control 90 mode and output amplitude V5 at color control 38 mode to calculate as follows : CLRSE = 100x (V4-V5) / (V2x52) Residual higher harmonic level B Residual higher harmonic level R Residual higher harmonic level G [Chroma block] : PAL ACC amplitude characteristics 1 ACCM1_P Bout 21 C-1 0dB +6dB Measure the output amplitude when 0dB is applied to the chroma input and the output amplitude when +6dB is applied to the chroma input and calculate the ratio between them. ACCM1 = 20Log (+6dBdata/0dBdata) ACC amplitude characteristics 2 ACCM2_P Bout 21 C-1 -20dB Measure the output amplitude when -20dB is applied to the chroma input and calculate the ratio between them. ACCM2 = 20Log (-20dBdata/0dBdata) Demodulation output ratio R-Y/B-Y : PAL RB_P 21 19 Demodulation output ratio G-Y/B-Y : PAL GB_P C-4 C-1 Refer to 5. and measure Bout output amplitude Vb and ROUT output amplitude Vr. And calculate RB = Vr/Vb. Measure Bout output amplitude Vbp and GOUT output amplitude Vgbp. And calculate GB_P = Vgbp/Vbp. C-5 Measure ROUT output amplitude Vrp and GOUT output amplitude Vgbp. And calculate GR_P = Vgrp/Vrp. C-1 Refer to 5. and measure the B-Y and R-Y demodulation angle and calculate. Color : 1000000 Color : 1000000 Color : 1000000 Color : 1000000 Color : 1000000 Color : 1000000 E_CAR_G E_CAR_R E_CAR_B 21 Rout 19 Gout 20 C-1 Burst only C-1 Burst only Burst only Measure the 8.86MHz component output amplitude at pin 21. Measure the 8.86MHz component output amplitude at pin 19. Measure the 8.86MHz component output amplitude at pin 20. Color : 1011010 Color : 0100110 Color : 0000000 Color : 1111111 Color : 1000000 Color : 1000000
21 20
Demodulation output ratio G-Y/R-Y : PAL
GB_P
20 19
Demodulation angle R-Y/B-Y : PAL
ANGBR_P
21 19
APC pull-in range (+)
PULIN+_P
21
C-1
Decrease the chroma fsc frequency from 4.433619MHz+1000Hz and measure the frequency at which the VCO locks.
APC pull-in range (-)
PULIN-_P
21
C-1
Increase the chroma fsc frequency from 4.433619MHz-1000Hz and measure the frequency at which the VCO locks.
Continued on next page.
No.0069-18/39
LA76832N
Continued from preceding page.
Parameter [Chroma block] : NTSC ACC amplitude characteristics 1 ACCM1_N Bout 21 C-1 0dB +6dB Measure the output amplitude when 0dB is applied to the chroma input and the output amplitude when +6dB is applied to the chroma input and calculate the ratio between them. ACCM1 = 20Log (+6dBdata/0dBdata) ACC amplitude characteristics 2 ACCM2_N Bout 21 C-1 -20dB Measure the output amplitude when 20dB is applied to the chroma input and calculate the ratio between them. ACCM2 = 20Log(-20dBdata/0dBdata) Demodulation output ratio R-Y/B-Y : NTSC RB_N 21 19 Demodulation output ratio R-Y/B-Y : NTSC GB_N C-1 C-1 Refer to 5. and measure Bout output amplitude Vb and ROUT output amplitude Vr. And calculate RB = Vr/Vb. Refer to 5. and measure GOUT output amplitude Vg. And calculate GB_N = Vg/Vb. Color : 1000000 Color : 1000000 Symbol Test point Input signal Test method Bus conditions
20
Demodulation angle B-Y/R-Y : NTSC
ANGBR_N
21 19
C-1
Refer to 5. and measure the B-Y and R-Y demodulation angle and calculate. Reference : B-Y angle
Color : 1000000
Demodulation angle G-Y/B-Y : NTSC
ANGGB_N
21 20
C-1
Refer to 5. and measure the B-Y and G-Y demodulation angle and calculate. Reference : B-Y angle
Color : 1000000
Killer operating point
KILL_N
21
C-1
Reduce the input signal until the output level becomes 150mVp-p or less. Measure the input level at that moment.
APC pull-in range (+)
PULIN+_N
21
C-1
Decrease the chroma fsc frequency from 3.579545MHz+1000Hz and measure the frequency at which the VCO locks.
APC pull-in range (-)
PULIN-_N
21
C-1
Increase the chroma fsc frequency from 3.579545MHz-1000Hz and measure the frequency at which the VCO locks.
Tint center Tint variable range (+)
TINCEN TINT+
21 21
C-1 C-1
Measure each part of the output level and calculate the B-Y axis angle. Measure each part of the output level and calculate the B-Y axis angle. TINT+ = B-Y axis angle -TINCEN
TINT : 1000000 TINT : 1111111
Tint variable range (-)
TINT-
21
C-1
Measure each part of the output level and calculate the B-Y axis angle. TINT- = B-Y axis angle -TINCEN
TINT : 0000000
[Filter Block Chroma BPF Characteristic] C-BPF1A Peaker amplitude characteristic 3.93MHz CBPF1A 21 C-3 PAL signal Set the chroma frequency (CW) to 4.433619MHz-100kHz and measure V0 output amplitude. And then, set the chroma frequency (CW) to 3.93MHz and measure V1 output amplitude to calculate as follows : CBPF1A = 20Log (V1/V0) C-BPF1B Peaker amplitude characteristic 4.73/4.13MHz C-BPF1C Peaker amplitude characteristic 4.93/3.93MHz CBPF1B C-3 PAL signal CBPF1B 21 C-3 PAL signal Measure V2 output amplitude when the chroma frequency (CW) is 4.13MHz and V3 output amplitude when it (CW) is 4.73MHz to calculate as follows : CBPF1B = 20Log (V3/V2) 21 Set the chroma frequency (CW) to 4.93MHz and measure V4 output amplitude to calculate as follows : CBPF1C = 20Log (V4/V1) FILTER SYS = 0010 C. BYPASS = 0 FILTER SYS = 0010 C. BYPASS = 0 FILTER SYS = 0010 C. BYPASS = 0
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No.0069-19/39
LA76832N
Continued from preceding page.
Parameter C-BPF2A BandPass amplitude characteristic 3.93MHz Symbol CBPF2A Test point 21 C-3 PAL signal Input signal Test method Set the chroma frequency (CW) to 4.433619MHz-100MHz and measure V00 output amplitude. And then, set the chroma frequency (CW) to 3.93MHz and measure V10 output amplitude to calculate as follows : CBPF2A = 20Log (V10/V00) C-BPF2B BandPass amplitude characteristic 4.73/4.13MHz C-BPF2C BandPass amplitude characteristic 4.93/3.93MHz CBPF2C C-3 PAL signal CBPF2B 21 C-3 PAL signal Measure V20 output amplitude when the chroma frequency (CW) is 4.13MHz and V30 output amplitude when it (CW) is 4.73MHz to calculate as follows : CBPF2B = 20Log (V30/V20) 21 Set the chroma frequency (CW) to 4.93MHz and measure V40 output amplitude to calculate as follows : CBPF2C = 20Log (V40/V10) FILTER SYS = 0011 C. BYPASS = 0 FILTER SYS = 0011 C. BYPASS = 0 Bus conditions FILTER SYS = 0011 C. BYPASS = 0
No.0069-20/39
LA76832N
Deflection Block Input Signals and Test Conditions Unless otherwise specified, the following conditions apply when each measurement is made. 1. VIF, SIF blocks : No signal 2. C input : No signal 3. Sync input : A horizontal/vertical composite sync signal PAL : 43IRE, horizontal sync signal (15.625kHz) and vertical sync signal (50kHz) NTSC : 40IRE, horizontal sync signal (15.734264kHz) and vertical sync signal (59.94kHz) Note : No burst signal, chroma signal shall exist below the pedestal level.
4. Bus control conditions : Initial conditions unless otherwise specified. 5. The delay time from the rise of the horizontal output (pin 27 output) to the fall of the FBP IN (pin 28 input) is 9s. 6. Pin 13 (vertical size correction circuit input terminal) is connected to VCC (5.0V).
Parameter [Deflection block] Horizontal free-running frequency Horizontal pull-in range
Symbol
Test point
Input signal
Test method
Bus conditions
fH
27
Y IN : No signal Y IN : Horizontal /vertical sync signal PAL
Connect a frequency counter to the output of pin 27 (H out) and measure the horizontal free-running frequency. Using an oscilloscope, monitor the horizontal sync signal which is input to the Y IN (pin 42) and the pin 27 output (H out) and vary the horizontal signal frequency to measure the pull-in range. Measure the voltage for the pin 27 horizontal output pulse's low-level period.
fH PULL
42
Horizontal output pulse length
Hduty
27
Y IN : Horizontal /vertical sync signal PAL
Horizontal output pulse saturation voltage
V Hsat
27
Y IN : Horizontal /vertical sync signal PAL
Measure the voltage for the pin 27 horizontal output pulse's low-level period.
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No.0069-21/39
LA76832N
Continued from preceding page.
Parameter Vertical free-running period 50 (PAL) Vertical free-running period 60 (NTSC) VFR60 Symbol VFR50 Test point 23 Input signal Y IN : No signal Test method Measure the vertical output period T at pin 23. Tx15.625kHz (PAL) Tx15.734kHz (NTSC) Bus conditions CDMODE : 001 (PAL) CDMODE : 002 (NTSC)
Vertical output
2.5V
T
Horizontal output pulse (PAL) (NTSC)
HPHCEN (PAL) (NTSC)
27 42
Y IN : Horizontal /vertical sync signal PAL NTSC
Measure the delay time from to the rise of the pin 27 horizontal output pulse to the fall of the Y IN horizontal sync signal.
HPHCEN
20IRE
2.5V Horizontal output
Horizontal position adjustment range HPHrange 27 42 Y IN : Horizontal /vertical sync signal PAL With H PHASE : 0 and 31, measure the delay time from the rise of the pin 27 horizontal output pulse to the fall of the Y IN horizontal sync signal and calculate the difference from H PHCEN. H PHASE : 11111 H PHASE : 00000
Measuring HPHCEN
20IRE 2.5V Horizontal output
Horizontal position adjustment maximum variable width HPHstep 27 42 Y IN : Horizontal /vertical sync signal PAL With H PHASE : 0 to 31 varied, measure the delay time from to the rise of the pin 27 horizontal output pulse to the fall of the Y IN horizontal sync signal and calculate the variation at each step. Retrieve data for maximum variation. H PHASE : 00000 to H PHASE : 11111
Measuring HPHCEN
20IRE
Horizontal output
POR circuit operating voltage VPOR 25 Y IN : Horizontal /vertical sync signal PAL Connect a DC power supply in place of the current source to pin 25 and gradually decrease the voltage from 5.0V until the BUS READ TATUS [POR] [STATUS1 (DA01) becomes "1". Measure the DC voltage at pin 25 at the moment.
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No.0069-22/39
LA76832N
Continued from preceding page.
Parameter Horizontal blanking left variable range@0 Symbol BLKL0 Test point 21 42 Input signal Y IN : Horizontal /vertical sync signal PAL Test method Measure the time T from the left end of Hsync at pin 42 Y IN to the left end of blanking at pin 21 BlueOUT with BLKL = 000. Bus conditions BLKL : 000
Y IN
Hsync
T
Blue
Horizontal blanking left variable range@7
BLKL7
21 42
Y IN : Horizontal /vertical sync signal PAL
Measure the time T from the left end of Hsync at pin 42 Y IN to the left end of blanking at pin 21 BlueOUT with BLKL = 111.
BLKL : 111
Y IN
Hsync
T
Blue
Horizontal blanking right variable range@0
BLKR0
21 42
Y IN : Horizontal /vertical sync signal PAL
Measure the time T from the left end of Hsync at pin 42 Y IN to the left end of blanking at pin 21 BlueOUT with BLKR = 000.
BLKR : 000
Y IN
T
Hsync
Blue
Horizontal blanking right variable range@7
BLKR7
21 42
Y IN : Horizontal /vertical sync signal PAL
Measure the time T from the left end of Hsync at pin 42 Y IN to the left end of blanking at pin 21 BlueOUT with BLKR = 111.
BLKR : 111
Y IN
T
Hsync
Blue
Sand castle pulse crest value H
SANDH
28
Y IN : Horizontal /vertical sync signal PAL
Measure the supply voltage at point H of the pin 28 FBP IN wave form for Hsync period.
H
Sand castle pulse crest value M1
SANDM1
28
Y IN : Horizontal /vertical sync signal PAL
Measure the supply voltage at point M1 of the pin 28 FBP IN wave form for Hsync period.
M1
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No.0069-23/39
LA76832N
Continued from preceding page.
Parameter Sand castle pulse crest value L Symbol SANDL Test point 28 Input signal Y IN : Horizontal /vertical sync signal PAL Test method Measure the supply voltage at point L of the pin 28 FBP IN wave form for Hsync period. Bus conditions
L
Sand castle pulse crest value M2
SANDM2
28
Y IN : Horizontal /vertical sync signal PAL
Measure the supply voltage at point M2 of the pin 28 FBP IN wave form for Vsync period.
L
Burst gate pulse length
BGPWD
28
Y IN : Horizontal /vertical sync signal PAL
Measure the BGP width T of the pin 28 FBP IN wave form for Hsync period.
T
Burst gate pulse I phase
BGPPH
28 42
Y IN : Horizontal /vertical sync signal PAL
Measure the time from the left end of Hsync at pin 42 Y IN to the left end of the pin 28 FBP IN wave form for Hsync period.
Y IN
Hsync
T
FBP IN
Horizontal output stop voltage
Hstop
25 27
Y IN : Horizontal /vertical sync signal Y IN : Horizontal /vertical sync signal
Decrease the current from a source connected to pin 25 and measure the pin 25 voltage at which HOUT stops. Connect a DC power supply to pin 34 and gradually increase the voltage from 0V until the pin 27 horizontal output pulse ceases. Measure the DC voltage at pin 34 at that moment.
X-ray protection circuit operating voltage
VXRAY
27 34
[Vertical screen size correction] Vertical ramp output amplitude PAL@64 NTSC@64 Vspal64 Vsnt64 23 Y IN : Horizontal /vertical sync signal PAL NTSC Monitor the pin 23 vertical ramp output and measure the voltage at line 24 and line 310. Calculate as follows : Vspal64 = Vline310-Vline24 Vsnt64 = Vline262-Vline22
Vertical ramp output Line 310 Line 24
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No.0069-24/39
LA76832N
Continued from preceding page.
Parameter Vertical ramp output amplitude PAL@0 Symbol Vspal0 Test point 23 Input signal Y IN : Horizontal /vertical sync signal PAL Test method Monitor the pin 23 vertical ramp output and measure the voltage at line 24 and line 310. Calculate as follows : Vspal0 = Vline310-Vline24 Bus conditions VSIZE : 0000000
Vertical ramp output Line 310 Line 24
Vertical ramp output amplitude PAL@127 Vspal127 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at line 24 and line 310. Calculate as follows : Vspal27 = Vline310-Vline24 VSIZE : 1111111
23
Vertical ramp output Line 310 Line 24
[High-voltage dependent vertical size correction] Vertical size correction@0 Vsizecomp 23 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at the line 24 and line 310 with VCOMP = 000. Calculate as follows : Va = Vline310-Vline24 Apply 4.1V to pin 13 and measure the voltage at the line 24 and line 310 again. Calculate as follows : Va = Vline310-Vline24 Calculate as follows : Vsizecomp = Vb/Va VCOMP : 000
Vertical ramp output Line 310 Line 24
[Vertical screen position adjustment] Vertical ramp DC voltage PAL@32 NTSC@32 Vdcpal32 Vdcnt32 23 Y IN : Horizontal /vertical sync signal PAL NTSC Monitor the pin 23 vertical ramp output and measure the voltage at line 167. (PAL) Monitor the pin 23 vertical ramp output and measure the voltage at line 142. (NTSC)
Vertical ramp output
Line 167
Vertical ramp DC voltage PAL@0
Vdcpal0
23
Y IN : Horizontal /vertical sync signal PAL
Monitor the pin 23 vertical ramp output and measure the voltage at line 167.
VDC : 000000
Vertical ramp output
Line 167
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No.0069-25/39
LA76832N
Continued from preceding page.
Parameter Vertical ramp DC voltage PAL@63 Symbol Vdcpal63 Test point 23 Input signal Y IN : Horizontal /vertical sync signal PAL Test method Monitor the pin 23 vertical ramp output and measure the voltage at line 167. Bus conditions VDC : 111111
Vertical ramp output
Line 167
Vertical linearity@16
Vlin16
23
Y IN : Horizontal /vertical sync signal PAL
Monitor the pin 23 vertical ramp output and measure the voltage at line 24, line 167 and 310. Assign the respective measured values to Va, Vb and Vc. Calculate as follows : Vlin16 = (Vb-Va) / (Vc-Vb)
Line 310 Vertical ramp output
Line 167 Line 24
Vertical linearity@0 Vlin0 23 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at line 24, line 167 and 310. Assign the respective measured values to Va, Vb and Vc. Calculate as follows : Vlin0 = (Vb-Va) / (Vc-Vb) VLIN : 00000
Line 310 Vertical ramp output
Line 167 Line 24
Vertical linearity@31 Vlin31 23 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at line 24, line 167 and 310. Assign the respective measured values to Va, Vb and Vc. Calculate as follows : Vlin31 = (Vb-Va) / (Vc-Vb) VLIN : 11111
Line 310 Vertical ramp output
Line 167 Line 24
Vertical S-shaped correction @16 VScor16 15 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at line 36, line 60, line 155, line 179, line 274 and 298. Assign the respective measured values to Va, Vb, Vc, Vd, Ve and Vf. Calculate as follows : VScor16 = 0.5 ( (Vb-Va) + (Vf-Ve) ) / (Vd-Vc) VS : 10000
Vertical ramp output
Line 274
Line 298
Line 179 Line 155 Line 60 Line 36
Continued on next page.
No.0069-26/39
LA76832N
Continued from preceding page.
Parameter Vertical S-shaped correction @0 Symbol VScor0 Test point 23 Input signal Y IN : Horizontal /vertical sync signal PAL Test method Monitor the pin 23 vertical ramp output and measure the voltage at the line 36, line 60, line 155, line 179, line 274 and line 298 with VSC = 00000. Assign the respective measured values to Va, Vb, Vc, Vd, Ve and Vf. Calculate as follows : VScor0 = 0.5 ( (Vb-Va) + (Vf-Ve) ) / (Vd-Vc) Bus conditions
Vertical ramp output
Line 274
Line 298
Line 179 Line 155 Line 60 Line 36
Vertical S-shaped correction @31
VScor31
23
Y IN : Horizontal /vertical sync signal PAL
Monitor the pin 23 vertical ramp output and measure the voltage at the line 36, line 60, line 155, line 179, line 274 and line 298 with VSC = 11111. Assign the respective measured values to Va, Vb, Vc, Vd, Ve and Vf. Calculate as follows : VScor31 = 0.5 ( (Vb-Va) + (Vf-Ve) ) / (Vd-Vc)
VSC : 11111
Vertical ramp output
Line 274
Line 298
Line 179 Line 155 Line 60 Line 36
[Horizontal size adjustment] East/Wst DC voltage@32 EWdc32 22 Y IN : Horizontal /vertical sync signal Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 167.
East/West DC voltage @0
EWdc0
22
Y IN : Horizontal /vertical sync signal
Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 167.
EWDC : 000000
East/West DC voltage @63
EWdc63
22
Y IN : No signal
Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 167.
EWDC : 111111
Continued on next page.
No.0069-27/39
LA76832N
Continued from preceding page.
Parameter Symbol Test point Input signal Test method Bus conditions
[High-voltage dependent horizontal size compensation] Horizontal size compensation @0 Hsizecomp 22 Y IN : Horizontal /vertical sync signal [Pincushion distortion compensation] East/West parabolic amplitude @32 EWamp32 22 Y IN : Horizontal /vertical sync signal Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 167 (Vb). Calculate as follows : EWamp32 = Vb-Va Monitor the West/East output of pin 22 and measure the voltage (Va) at line 167. Apply 4.0V to pin 13 and measure again the voltage (Vb) at line 167. Calculate as follows : Hsizecomp = Va-Vb HCOMP : 000
East/West parabolic amplitude @0
EWamp0
22
Y IN : Horizontal /vertical sync signal
Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 167 (Vb). Calculate as follows : EWamp32 = Vb-Va
EWAMP : 000000
East/West parabolic amplitude @63
EWamp63
22
Y IN : Horizontal /vertical sync signal
Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 167 (Vb). Calculate as follows : EWamp63 = Vb-Va
EWAMP : 111111
[Trapezoidal distortion compensation] East/West parabolic tilt @32 EWtilt32 22 Y IN : Horizontal /vertical sync signal Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 310 (Vb). Calculate as follows : EWtilt32 = Va-Vb
Continued on next page.
No.0069-28/39
LA76832N
Continued from preceding page.
Parameter East/West parabolic tilt @0 Symbol EWtilt0 Test point 22 Input signal Y IN : Horizontal /vertical sync signal Test method Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 310 (Vb). Calculate as follows : EWtilt32 = Va-Vb Bus conditions EWTILT : 000000
East/West parabolic tilt @63
EWtilt63
22
Y IN : Horizontal /vertical sync signal
Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 310 (Vb). Calculate as follows : EWtilt32 = Va-Vb
EWTILT : 111111
[Corner distortion compensation] East/West parabolic corner TOP EWcortop 22 Y IN : Horizontal /vertical sync signal Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 under conditions of CORTOP : 1111 (Va) and CORTOP : 0000 (Vb). Calculate as follows : Ewcortop = Va-Vb CORTOP : 1111-0000
East/West parabolic corner BOTTOM
EWcorbot
22
Y IN : Horizontal /vertical sync signal
Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 310 under conditions of CORBOT : 1111 (Va) and CORBOT : 0000 (Vb). Calculate as follows : Ewcorbot = Va-Vb
CORBOTTOM : 1111-0000
No.0069-29/39
LA76832N
LA76832N Pin Assignment
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 FUNCTION Audio Output FM Output PIF AGC RF AGC Output PIF Input1 PIF Input2 IF Ground IF VCC FM Filter AFT Output Bus Data Bus Clock ABL Red Input Green Input Blue Input Fast Blanking Input RGB VCC Red Output Green Output Blue Output E/W Output Vertical Output Ramp ALC Filter Horizontal/BUS VCC Horizontal AFC Filter Horizontal Output PIN 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 FUNCTION SIF Input SIF APC Filter SIF Output Ext. Audio Input APC Filter VCO Coil 1 VCO Coil 2 VCO Filter Video Output Black Level Detector Internal Video Input (S-C IN) Video/Vertical VCC External Video Input (Y IN) Video/Vertical/BUS Ground Selected Video Output Chroma APC1 Filter 4.43MHz Crystal Clamp Filter Chroma APC2 Filter Fsc or Csync Output XRAY CCD/Horizontal Ground CCD Filter CCD VCC Clock (4MHz) Output VCO IREF Flyback Pulse Input
No.0069-30/39
LA76832N
LA76832N BUS Control Register Bit Allocation Map
Sub Address MSB DA0 00000000 ON/OFF 1 00001 Vreset Timing 0 00010 Sync. Kill 0 00011 VSEPUP 0 00100 H BLK L 1 00101 H BLK R 1 00110 V. TEST 0 00111 R. BIAS 0 01000 G. BIAS 0 01001 B. BIAS 0 01010 * (0) 01011 Drive. Test 0 01100 * (0) 01101 Blank. Def 0 01110 IF Test1 0 01111 IF Test2 0 Bright 1 Contrast 1 0 0 0 0 0 0 0 0 0 0 0 0 0 R. DRIVE 1 Half tone 0 B. DRIVE 1 Sub. Bias 1 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 Half tone Def 1 1 G. DRIVE 1 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 V. COMP 1 1 1 0 0 V. SC 0 1 0 1 1 DA1 AFC gain & gate 0 Audio. Mute 0 V. SIZE 1 V. KILL 0 0 V. POSI 1 0 V. LIN 1 0 0 0 0 0 0 0 0 0 0 0 0 0 DA2 H.FREQ 1 Video. Mute 0 1 H. PAHSE 1 0 0 0 0 1 1 1 1 DA3 DATA BITS DA4 DA5 DA6
IC Address (WRITE) : 10111010
LSB DA7
COUNT. DOWN. MODE 0 0 0
(Bits are transmitted in this order.) Continued on next page.
No.0069-31/39
LA76832N
Continued from preceding page.
Sub Address MSB DA0 00010000 OSD Cnt. Test 0 10001 Blk. Str. Def 1 10010 Tint. Test 0 10011 Color. Test 0 10100 Video SW 0 10101 Gray Mode 0 10110 VBLK SW 0 10111 Y Gamma Start 0 11000 Auto. Flesh 0 11001 Cont. Test 0 11010 R-Y/B-Y Gain Balance 1 11011 0 0 0 0 C. Ext 0 Digital OSD 0 Color 1 Trap Test 1 Cross B/W 0 FBPBLK. 1 0 Fsc or Csync 0 DC. Rest 0 C. Bypass 1 Brt. Abl. Def 0 0 C_Kill ON 0 Mid. Stp. Def 0 0 0 * (0) WPL 0 0 0 0 Filter. Sys 0 G-Y Angle (0) Pre-shoot adj. 0 Blk. Str. start 0 C_Kill OFF 0 RGB Temp 0 R-Y/B-Y Angle 1 0 0 0 0 Color. Sys 0 Bright. Abl. Threshold 1 0 0 0 0 0 0 Color killer ope. 0 0 Coring Gain 0 Blk. Str. Gain 0 0 0 0 1 0 0 0 0 Tint 1 0 0 0 0 0 0 DA1 OSD Contrast 1 Coring 1 0 Sharpness 0 0 0 0 0 0 0 0 0 0 0 DA2 DA3 DATA BITS DA4 DA5 DA6 LSB DA7
B-Y DC Level (White-Balance) 1 0 Volume 0 VOL. FIL 0 deem. TC 1 0 RF. AGC 1 VIF. Sys. SW 1 0 FM. LEVEL 0 0 1 0 0 0 0
R-Y DC Level(White-Balance) 1 0 0 0
11100
Audio SW 0
0
0
0
0
11101
IF Test 0
0 SIF. Sys. SW 0
0
0 FM. Gain
0 IF. AGC 0
11110
FM. Mute 0
0
1
11111
VIDEO. LEVEL 1
0
0
0
0
(Bits are transmitted in this order.)
No.0069-32/39
LA76832N
LA76832N BUS:Control Register Truth Table
Register Name ON/OFF (T. Disable) AFC gain & gate 0 HEX OFF (Tset Enable) Auto (Gain) Auto (Gate) V Reset Timing Audio. Mute Video. Mute Sync. Kill Vsepup V. KILL Gray Mode Cross B/W Vertical Test Half Tone Def Normal Active Active Sync active normal Vrt active Normal Normal Normal Half Tone on 1 HEX ON (Test Disable) Gain : Fast Non-Gate 1/4H Shift Mute Mute Sync killed Vsepup Vrt killed Gray OSD Black Vrt S Corr Half Tone off White Vrt Lin Cross Vrt Size 2 HEX 3 HEX
Drive. Test Blank. Def OSD Cnt. Test Blk. Str. Def Coring Tint. Test Color. Test Video. SW G-Y Angle VBLK SW
Normal Blanking Normal Blk Str On Core Off Normal Normal Internal Mode 240deg 24H to 262H (NTSC) 25H to 309H (PAL)
Test Mode No Blank Test Mode Blk Str Off Core On Test Mode Test Mode External Mode 253deg 29H to 256H (NTSC) 30H to 304H (PAL) 35pin : Csync out FBP or WPL ON +10ns -> Min 106% -> -> ON External Mode Bypass ON Killer ON Killer OFF Test Mode Digital Brt ABL Off Mid Stp Off External Mode Filte OFF Mute 75s 38.9MHz 5.5MHz 25kHz dev AGC defeat 45.75MHz 6.0MHz 39.5MHz 6.5MHz +20ns -> -> 113% High Max +30ns Max Max 128%
Fsc or Csync FBPBLK. SW WPL Pre-shoot adj. Coring Gain Y Gamma Start DC Rest. Blk. Str. start Blk. Str. Gain Auto Flesh C. Ext C. Bypass C_Kill ON C_Kill OFF Cont. Test Digital OSD Brt. ABL. Def Mid. Stp. Def Audio. SW VOL. FIL FM. Mute de-em TC. VIF. Sys. SW SIF. Sys. SW FM Gain IF. AGC
35pin : Fsc out FBP not or WPL OFF Normal Min Y Gamma off 100% Low Min OFF Internal Mode Bypass OFF Auto Mode Auto Mode Normal Analogue Brt ABL On Mid Stp On Internal Mode Normal Active 50s 38.0MHz 4.5MHz 50kHz dev. AGC active
No.0069-33/39
LA76832N
LA76832N BUS : Control Register Truth Table COUNT DOWN MODE
50Hz/60Hz MODE 0 HEX 1 HEX 2 HEX 3 HEX 4 HEX 5 HEX 6 HEX 7 HEX Auto 50Hz 60Hz Auto Auto 50Hz 60Hz Auto Standard/Non-Standard MODE Auto Auto Auto Auto Non-Standard Non-Standard Non-Standard Non-Standard
Color System
0 HEX 1 HEX 2 HEX 3 HEX 4 HEX 5 HEX 6 HEX 7 HEX Auto Mode1 PAL/NTSC/4.43NTSC (/SECAM) Auto Mode2 PAL-M/PAL-N/NTSC PAL PAL-M PAL-N NTSC 4.43NTSC SECAM
Filter System
Y Filter 0 HEX 1 HEX 2 HEX 3 HEX 4 HEX 5 HEX 6 HEX 7 HEX 8-15HEX 3.58MHz Trap 3.58MHz Trap 4.43MHz Trap 4.43MHz Trap 6.0MHz Trap 6.0MHz Trap 6.0MHz Trap 6.0MHz Trap 4.286MHz Trap Chroma Filter Peaked 3.58MHz BPF Symmetrical 3.58MHz BPF Peaked 4.43MHz BPF Symmetrical 4.43MHz BPF Peaked 3.58MHz BPF Symmetrical 3.58MHz BPF Peaked 4.43MHz BPF Symmetrical 4.43MHz BPF Symmetrical 4.43MHz BPF
LA76832N BUS : Status Byte Truth Table
Register XRAY (POR) IF. IDENT RF. AGC IF. LOCK V. TRI 50/60 ST/NONST H. LOCK KILLER 0 HEX Undetected (Undetected) Sync Undetected RF. AGC. OUT = "L" Lock V. Triger Undetected 50 Non-Standard Horiz Unlocked KILLER OFF 1 HEX Detected (Detected) Sync Detected RF. AGC. OUT = "H" Unlock V. Triger Detected 60 Standard Horiz Locked KILLER ON
Color System
0 HEX 1 HEX 2 HEX 3 HEX 4 HEX 5 HEX 6 HEX 7 HEX
B/W PAL PAL-M PAL-N NTSC 4.43NTSC SECAM Do not care
No.0069-34/39
LA76832N
LA76832N BUS Initial Conditions
Register ON/OFF (T. Disable) AFC gain & gate H. FREQ V Reset Timing Audio. Mute Video. Mute H. PHASE Sync. Kill V. SIZE VSEPUP V. KILL V. POSI V. LIN V. SC H BLK L H BLK R V. TEST V. COMP COUNT. DOWN. MODE R. BIAS G. BIAS B. BIAS R. DRIVE Drive Test Half Tone Half Tone Def G. DRIVE B. DRIVE Blank. Def Sub. Bias Bright Contrast 1 HEX 0 HEX 3F HEX 0 HEX 0 HEX 0 HEX 10 HEX 0 HEX 40 HEX 0 HEX 0 HEX 20 HEX 10 HEX 0B HEX 4 HEX 4 HEX 0 HEX 7 HEX 0 HEX 00 HEX 00 HEX 00 HEX 7F HEX 0 HEX 1 HEX 1 HEX 8 HEX 7F HEX 0 HEX 40 HEX 40 HEX 40 HEX OSD Cnt. Test OSD Contrast Blk. Str. Def Coring Sharpness Tint. Test Tint Color. Test Color Video. SW Trap. Test Filter. Sys Gray Mode Cross B/W G-Y Angle Color Killer Ope. VBLK SW FBPBLK. SW Fsc or Csync WPL Pre-shoot Adj. Coring Gain Y Gamma DC. Rest. Blk. Str. start Blk. Str. Gain Auto Flesh C. Ext C. Bypass C_Kill ON C_Kill OFF Color System Cont. Test East/West DC East/West Amp East/West Tilt East/West Corner TOP East/West Corner Bottom East/West Test H. Size. Comp 20 HEX 20 HEX 20 HEX 0 HEX 0 HEX 0 HEX 7 HEX Digitsl OSD Brt. Abl. Def Mid. Stp. Def Bright. Abl. Threshold R-Y/B-Y Gain Balance R-Y/B-Y Angle B-Y DC Level R-Y DC Level Audio. SW RGB Temp SW IF Test IF Test1 IF Test2 IF Test3 0 HEX 0 HEX 0 HEX 0 HEX 48 HEX Volume VOL. FIL RF. AGC FM. Mute deem. TC VIF. Sys. SW SIF. Sys. SW FM. Gain IF. AGC VIDEO. LEVEL FM. LEVEL Register 0 HEX 0 HEX 1 HEX 1 HEX 00 HEX 0 HEX 40 HEX 0 HEX 40 HEX 0 HEX 4 HEX 2 HEX 0 HEX 0 HEX 0 HEX 4 HEX 0 HEX 1 HEX 0 HEX 1 HEX 0 HEX 3 HEX 0 HEX 2 HEX 1 HEX 1 HEX 0 HEX 0 HEX 1 HEX 0 HEX 0 HEX 0 HEX 0 HEX 0 HEX 0 HEX 0 HEX 4 HEX 8 HEX 8 HEX 8 HEX 8 HEX 0 HEX 00 HEX 0 HEX 20 HEX 0HEX 1HEX 2 HEX 0 HEX 1 HEX 0 HEX 4 HEX 10 HEX
No.0069-35/39
LA76832N
LA76832N Bus Control Register Descriptions
Register Name ON/OFF (T Disable) AFC Gain & gate H Freq. V Reset Timing Audio Mute Video Mute H PHASE Sync Kill Vertical Size Vsep. up Vertical Kill V POSI (Vertical DC) H BLK L H BLK R V LIN (Vertical Linearity) Vertical S-Correction Vertical Test Vertical Size Compensation Count Down Mode Red Bias Green Bias Blue Bias Red Drive Drive Test Half Tone Half Tone Defeat Green Drive Blue Drive Blank Def Sub Bias Brightness Control Contrast Control OSD Contrast Test OSD Contrast Control Blk Str Def Coring Enable Sharpness Control Tint Test Tint Control Color Test Color Control Video SW Trap. Test Filter System Gray Mode Cross B/W G-Y Angle Select Color Killer Operational Point Select Vertical Blanking SW FBPBLK. SW Fsc or Csync Output White Peak Limitter SW Pre-shoot Adjustmant Coring Gain Select Bits 1 1 6 1 1 1 5 1 7 1 1 6 3 3 5 5 2 3 1 8 8 8 7 1 2 1 4 7 1 7 7 7 1 2 1 1 6 1 7 1 7 1 3 3 1 2 1 3 1 1 1 1 2 2 General Description Enable the horizontal output & Disable the Test SW & enable Audio / Video Select horizontal first loop gain & H-sync gating on/off Align ES Sample horizontal frequency Select Vertical Reset Timing Disable audio outputs Disable video outputs Align sync to flyback phase Force free-run mode Align vertical amplitude Select vertical sync. separation sensitivity Disable vertical output Align vertical DC bias H-Blanking Control (Left side of the screen) H-Blanking Control (Right side of the screen) Align vertical linearity Align vertical S-correction Select vertical DAC test modes Align vertical size compensation Select vertical countdown mode Align Red OUT DC level Align Green OUT DC level Align Blue OUT DC level Align Red OUT AC level Enable Drive control DAC test modes Adjust half tone level Half tone defeat SW Align Green OUT AC level Align Blue OUT AC level Disable RGB output blanking Align common RGB DC level Customer brightness control Customer contrast control Enable OSD Contrast DAC test mode Align OSD AC level Disable Black stretch Enable luminance coring Customer sharpness control Enable tint DAC test mode Customer tint control Enable color DAC test mode Customer color control Select Video source Trap Test Select Y/C Filter mode OSD Gray Tone Enable Service Test Mode (normal/Black/White/Cross) Select G-Y Angle Select Color Killer Operational Point Select VBLK Period Enable RGB Blanking or FBP Select 35pin Output (0 : Fsc 1 : Csync) Enable WPL Select Pre-shoot Width Select Coring Gain
Continued on next page.
No.0069-36/39
LA76832N
Continued from preceding page.
Register Name Y Gamma Start DC Restoration Select Blk. Str. Start Point Select Blk. Str. Gain Select AutoFlesh C Ext C Bypass C Kill On C Kill Off Color System Cont Test Bright ABL Defeat Bright Mid Stop Defeat Bright ABL Threshold Digital OSD SW R-Y/B-Y Balance R-Y/B-Y Angle B-Y DC Level R-Y DC Level Audio SW Volume Control Volume Filter Defeat RF AGC Delay FM Mute de-em TC. VIF System SW SIF System SW FM Gain IF AGC Defeat Video Level FM Level East/West DC East/West Amp East/West Tilt East/West Corner TOP East/West Corner Bottom East/West Test H. Size. Comp Bits 2 2 2 2 1 1 1 1 1 3 1 1 1 3 1 4 4 4 4 1 7 1 6 1 1 2 2 1 1 3 5 6 6 6 4 4 3 3 General Description Select Y Gamma Start Point Select Luma DC Restoration Select Black stretch Start Point Select Black stretch Gain Enable AutoFlesh function Selected-C In SW on Select Chroma BPF bypass C Kill Mode (1 : Enable Killer circuit) Disable Killer circuit Select Color System Enable contrast DAC test mode Disable brightness ABL Disable brightness mid stop Align brightness ABL threshold Select Digital/Analogue OSD R-Y/B-Y Gain Balance R-Y/B-Y Angle B-Y DC Level (White-Balance) R-Y DC Level (White-Balance) Select Audio source Customer volume control Disable volume DAC filter Align RF AGC threshold Disable FM outputs Select de-emphasis Time Constant Select 38.0/38.9/39.5/45.75 Select 4.5/5.5/6.0/6.5 Select FM Output Level Disable IF and RF AGC Align IF video level Align WBA output level Align East/West DC Align East/West amplitude Align East/West tilt Align bottom corner correction Align top corner correction Select East/West DAC test modes Align horizontal size compensation
RGB TEST IF TEST IF TEST1 IF TEST2 IF TEST3
1 1 1 1 8
Select test modes Select test modes Select test modes Select test modes Select test modes
No.0069-37/39
LA76832N
Description of Read Status
X-RAY X-ray detection circuit is activated with thyristor by means of the threshold voltage from Gnd to 1Vbe. Simultaneously with activation of thyristor, the H drive pulse is stopped and the thyristor output is sent to BUS. BUS Read enables reading of the real-time state of thyristor. To cancel thyristor operation, it is necessary to lower VCC once. 1HEX : Detected POR The POR detection circuit cannot be used in LA76832 and should be ignored. The circuit is operating and performs detection with HVCC = <3.6V. At the same time, the memory for Bus Read is set. (Memory is set at power ON.) To reset the memory, it is necessary to set the ON/OFF control bit to zero once. Since the BUS Read Status and ACK are not returned simultaneously with detection, BUS cannot be read at detection. Failure of ACK return may be useful at detection. For example, the BUS communication start may be timed with ACK at power ON. RF. AGC IF. LOCK V. TRI ST/NONST 0 : RFAGC OUT = "L", 1 : RFAGC OUT = "H" For details, refer to the Application Note. Ignore because this does not function fully at present. Returns the output of V trigger detection circuit in VCD. The internal memory status is renewed at every A. 1HEX : Detected Returns the output of V trigger detection circuit output in VCD standard (262.5 H) and NON standard. Returns in real time the FF output whose mode is determined in VCD. 1HEX : Standard For details, contact us after referring to the Application Note. H. Lock KILLER Detects the phase of FBP and Hsync, integrates the output, and detects in about 40H after HVCO LOCK. 1Hex : Locked Returns the color killer condition. However, the time constant is long, so that about 1V cycle (16 ms) is necessary for detection. Pay attention to the wait for change in the device status. Returns the real-time status for BUS Read. 1HEX : Killer ON Color sys Returns the color system status. Refer to the color system table in the register truth table. The read status is the same as for BUS Write.
Package Dimensions
unit : mm 3273
No.0069-38/39
LA76832N
Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of October, 2005. Specifications and information herein are subject to change without notice. PS No.0069-39/39


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